A PDF version can be found here.

Farzad Fatollahi-Fard

570 Page St., Apt. 3
San Francisco, CA 94117
Phone: 415-625-3935


To expand my knowledge base and perform research within the fields of electrical engineering and computer science and to find a long-term career position at a stable company.


University of California, Berkeley, Berkeley, CA (May 2009)
Bachelors of Science, Electrical Engineering and Computer Science


Lawrence Berkeley National Lab, Berkeley, CA
FPGA Computing Systems Engineer (March 2013 - Present)

  • Design, develop, maintain, and support OpenSoC Fabric, a parameterizable network-on-chip generator
  • Design and assemble system-on-chip devices for high performance computing design space exploration
  • Contribute and support tools developed for the CoDeX project
  • Cross collaborate with sister labs in the Computer Architecture Lab
  • Coordinated and organized SoC for HPC workshop series

BEEcube, Inc., Fremont, CA
Hardware Engineer (May 2010 – March 2013)

  • Develop, maintain, and support embedded controller and firmware for BEE4 and miniBEE4 FPGA platform
  • Design miniBEE4 platform, heading schematic capture and managed first prototype run
  • Design daughter boards for BEE4 and miniBEE4, including multi-gigabit digital and analog boards

University of California, Berkeley, Berkeley Wireless Research Center (BWRC), Berkeley, CA
Junior Staff Engineer (September 2009 - May 2010)

  • Develop and maintain embedded controller for BEE3 FPGA platforms in which users can log in remotely, develop, and test designs
  • Design and built expansion board for embedded controller with USB FIFO, UART over USB, and PCIe for communication to FPGAs

Student Staff (August 2008 - September 2009)

  • Built and maintained an FPGA Build cluster in which users can log in remotely, develop and test design on a BEE3 FPGA platform
  • Built and developed a Cloud Computing cluster based on the low-power Intel Atom platform

University of California, Berkeley, Department of Electrical Engineering and Computer Science, Electronic Support Group (ESG), Berkeley, CA
Engineering Assistant (June 2009 - August 2009)

  • Developed lab material for the introductory circuits courses based on the Texas Instruments MSP430 Experimenter Platform
  • Designed an expansion board for microcontrollers and FPGAs which provides Bluetooth connectivity to the platforms

Engineering Assistant (June 2008 - August 2008)

  • Provided support for the labs in Cory Hall
  • Evaluated Xilinx ML505/XUPv5, Altera DE2-70, and Altera DE3 for next educational platform for the EECS150 course (Components and Design Techniques for Digital Systems)

Santa Rosa Junior College, Mathematics Engineering Science Achievement (MESA) Program, Santa Rosa, CA
MESA Student Tutor (August 2006 - May 2007)

  • Led Academic Excellence Workshops in algebra and classical physics entailing solving sample problems and directing group work
  • Provided tutoring services for students in physics, algebra, trigonometry/pre-calculus, calculus, differential calculus, linear algebra, C++ programming, and Data Structures & Algorithms

Santa Rosa Junior College, Physics Department, Santa Rosa, CA
Grader/Reader (January 2006 - May 2006)

  • Graded homework, quizzes, tests, and lab reports in calculus-based physics courses, such as Physics 40, a course in classical mechanics.

NeoFarz Information Technology, Novato, CA
Web Designer/Developer (December 2001 - May 2008)

  • Designed, developed, and maintained San Rafael Pediatrics website ( including site content and editorial updates.

Technical Support (April 2004 - August 2007)

  • Provide computer technical support to local businesses and residences; reinstalling client computers, setting up local area networks, and instituting Internet securities for clients.

Research Experience

Computer Architecture Lab (CAL) and CoDesign for Exascale (CoDeX), Lawrence Berkeley National Lab (Mar. 2013 - Present)

  • Designed and developed a network-on-chip generator, OpenSoC Fabric, for exascale design space exploration
  • Developed multicore system with Tensilica processors in FPGA environment

Research Accelerator for Multiple Processors (RAMP), University of California, Berkeley (Apr. 2008 - May 2009)

  • Designed and began developing a fully IEEE754-Compliant Double Precision Floating Point Unit for Xilinx Virtex-5 FGPAs
  • Designed and developed firmware for the Xilinx SystemACE

Class Projects

  • Racing Robot Car for NATCAR (Spring 2009)
      Finished First Place at Inter-University NATCAR Competition (achieved speed of 9.71 ft/s)
  • Analog AM Radio (Spring 2008)
  • Wireless Videoconferencing with an FPGA platform (Spring 2008)


Warren Y. Dere Design Award (Spring 2010)

  • Presented to a graduating senior in EECS whose accomplishment in engineering design is judged to be most outstanding

Programming Languages & Skills

Knowledge in Chisel, Scala, Verilog, VHDL, C, C++, Java, MATLAB, LabView, JavaScript, Perl, Python, and PHP
Skills in oscilloscopes, multimeters, spectrum analyzer, DC power supplies, soldering, crimping, CAD, Tensilica Processor Generator, OrCAD and Allegro PCB schematic capture and layout


Available upon request